1. Field of the Invention
This invention relates to memory arrays and, more particularly, to methods for assuring that an erase operation has taken place in a flash electrically erasable programmable read only memory (flash EEPROM) array.
2. History of the Prior Art
Modern computer systems make extensive use of long term memory. Typically this memory is provided by one or more hard (fixed) disk drives. A hard disk drive is an electro-mechanical device which includes one or more flat circular disks fixed to rotate rapidly about a central axis. Each flat disk has opposite surfaces which are coated with some form of magnetic material upon which bits of data may be stored by a magnetic head carried by a mechanical arm. The bits are stored in fixed size sectors of a plurality of tracks which lie on each side of a magnetic disk. A typical disk drive used in personal computers today is capable of storing forty or more megabytes of data.
Such disk drives are very useful and have become almost a necessity to the operation of personal computers. However, such electro-mechanical drives do have their drawbacks. They are relatively heavy and increase the weight of a computer, especially a portable computer, significantly. More importantly, electro-mechanical hard disk drives are very susceptible to shock. A hard disk drive in a portable computer which is dropped is quite likely to cease functioning with a catastrophic loss of data.
Recently, forms of long term storage other than electro-mechanical hard disk drives have become feasible for use in computers. One of these forms of long term storage is called flash EEPROM. Flash EEPROM memory is comprised of a large plurality of floating gate transistors arranged as memory cells in typical row and column fashion with circuitry for accessing individual cells and placing the memory transistors of those cells in one of two memory conditions. In contrast to the transistors used in dynamic random access memory, a flash memory cell (like other EPROM cells) retains information when power is removed. Flash EEPROM memory has a number of characteristics which adapt it to use as long term memory. It is light in weight and occupies very little space. More importantly, it is especially rugged. It will withstand without adverse effects repeated drops each of which would destroy a typical electro-mechanical hard disk.
A peculiarity of flash EEPROM, however, is that one form is erased by applying a high voltage simultaneously to the source terminals of all of the transistors (cells) used in a large portion of the array. Because these source terminals are all connected to one another in the array by metallic busing, the entire portion of the array must be erased at once. While an electro-mechanical hard disk will typically store information in a first area of the disk and then rewrite that same area of the disk when the information changes, this is not possible with a flash memory array without erasing all of the valid information that remains in that portion of the array along with the invalid (dirty) information.
Because of this, a different arrangement is used for rewriting data and erasing dirty sectors of a flash EEPROM array. First, the entire array is divided into smaller separately erasable blocks so that when a block is erased the amount of valid data which must be reprogrammed is reduced. Typically, the array is composed of a number of silicon chips; and each such chip includes a number of such blocks. Then, when the information at a data entry changes, the changed information is written to a new sector on an available block rather than written over the old data; and the old data is marked dirty. After a sufficient number of sectors on a block have been marked dirty, the entire block is erased. When erasure occurs, all of the valid data in the block to be erased is written to a new block; and then the dirty block is erased and put back into use as a clean block of memory. Because of this involved erasure process, it typically takes as much as two seconds to erase a block of a flash EEPROM array. However, because erasure need not occur with each entry which is rewritten, erasure may be delayed until a block contains a sufficient amount of dirty information that cleanup is feasible. This reduces the number of erasure operations to a minimum and allows erasure to occur in the background when the facilities for controlling the array are not otherwise occupied with reading and writing.
A problem which occurs with this and other forms of flash EEPROM, however, is that the background erasing process may be occurring at an instant at which power is removed from the system. This might occur with a power outage but is as likely to occur whenever the system is simply turned off since the process of erasure occurs in the background so far as the computer operating system is concerned. If a block of an array of flash EEPROM cells is in the process of erasure (in one embodiment, the memory cells are being switched from all cells being in the zero state to all cells being in the one state) when power is removed from the system, the cells of that block may or may not be placed into an erased state. Since it is impossible to program cells which are not in the one state, an ineffective erase operation leaves a block temporarily unusable. Consequently, when the power is turned back on, it is desirable for the system to be able to determine the condition of any blocks of the array which were being erased when power was removed so that the erase process may be repeated and those blocks may be properly utilized by the system.